The DMA Controller with AHB interface is full featured, easy-to-use, synthesizable design that can be used with AHB based systems as a controller to transfer data directly from system memory to IP core or from IP core to system memory.
The DMA Controller AHB IIP core supports AMBA 2 AHB specification. Through its compatibility, it provides a simple interface to any IP core with the appropriate logic inbetween. The DMA Controller AHB IIP can be implemented in any technology.
The DMA Controller AHB IIP is delivered in Verilog RTL that can be implemented in an ASIC or FPGA. The DMA Controller AHB IIP is validated using FPGA. The core includes RTL code, test scripts and a test environment for complete simulation.
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